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→Distributed Memory 分布式存储
</math> are the amount of processing elements in each row and column, respectively. Then each processor gets a submatrix of the adjacency matrix of dimension <math>(n/p_r)\times(n/p_c)</math>. This can be visualized as a checkerboard pattern in a matrix. Therefore, each processing unit can only have outgoing edges to PEs in the same row and column. This bounds the amount of communication partners for each PE to <math>p_r + p_c - 1</math> out of <math>p = p_r \times p_c</math> possible ones.
</math> are the amount of processing elements in each row and column, respectively. Then each processor gets a submatrix of the adjacency matrix of dimension <math>(n/p_r)\times(n/p_c)</math>. This can be visualized as a checkerboard pattern in a matrix. Therefore, each processing unit can only have outgoing edges to PEs in the same row and column. This bounds the amount of communication partners for each PE to <math>p_r + p_c - 1</math> out of <math>p = p_r \times p_c</math> possible ones.
'''<font color="#32CD32"></math > 是每行和每列中处理元素的数量。然后每个处理器得到维数 <math> (n/p_r)乘以(n/p_c)</math> 的邻接矩阵。这可以可视化为矩阵中的棋盘格模式。因此，每个处理单元只能在同一行和列中具有 PE 的外出边。这将每个 PE 的通信伙伴的数量限制为 <math> p_r + p_c-1 </math> 出 <math> p = p_r 乘以 p_c </math> 可能的伙伴。</font>'''</math> are the amount of processing elements in each row and column, respectively. Then each processor gets a submatrix of the adjacency matrix of dimension <math>(n/p_r)\times(n/p_c)</math>. This can be visualized as a checkerboard pattern in a matrix. Therefore, each processing unit can only have outgoing edges to PEs in the same row and column. This bounds the amount of communication partners for each PE to <math>p_r + p_c - 1</math> out of <math>p = p_r \times p_c</math> possible ones.
'''<font color="#32CD32"></math > 是每行和每列中处理元素的数量。然后每个处理器得到维数 <math> (n/p_r)乘以(n/p_c)</math> 的邻接矩阵。这可以可视化为矩阵中的棋盘格模式。因此，每个处理单元只能在同一行和列中具有 PE 的输出边。这将每个 PE 的通信伙伴的数量限制为 <math> p_r + p_c-1 </math> 出 <math> p = p_r 乘以 p_c </math> 可能的伙伴。</font>'''</math> are the amount of processing elements in each row and column, respectively. Then each processor gets a submatrix of the adjacency matrix of dimension <math>(n/p_r)\times(n/p_c)</math>. This can be visualized as a checkerboard pattern in a matrix. Therefore, each processing unit can only have outgoing edges to PEs in the same row and column. This bounds the amount of communication partners for each PE to <math>p_r + p_c - 1</math> out of <math>p = p_r \times p_c</math> possible ones.
--信白该句存疑，</math>是代码吗？这块儿没明白怎么搞
--信白该句存疑，</math>是代码吗？这块儿没明白怎么搞