更改

1D partitioning: Every processor gets <math>n/p</math> vertices and the corresponding outgoing edges. This can be understood as a row-wise or column-wise decomposition of the adjacency matrix. For algorithms operating on this representation, this requires an All-to-All communication step as well as <math>\mathcal{O}(m)</math> message buffer sizes, as each PE potentially has outgoing edges to every other PE.

1D partitioning: Every processor gets <math>n/p</math> vertices and the corresponding outgoing edges. This can be understood as a row-wise or column-wise decomposition of the adjacency matrix. For algorithms operating on this representation, this requires an All-to-All communication step as well as <math>\mathcal{O}(m)</math> message buffer sizes, as each PE potentially has outgoing edges to every other PE.

1D 分区: 每个处理器都会得到 < math > n/p </math > 顶点和相应的外出边。这可以理解为按行或按列对邻接矩阵进行分解。对于在这种表示形式上运行的算法，这需要一个 All-to-All 通信步骤以及 < math > mathcal { o }(m) </math > 消息缓冲区大小，因为每个 PE 可能具有相对于其他 PE 的传出边缘。

1D 分区: 每个处理器都会得到 <math>n/p</math> 顶点和相应的外出边。这可以理解为按行或按列对邻接矩阵进行分解。对于在这种表示形式上运行的算法，这需要一个 All-to-All 通信步骤以及 <math> mathcal{o}(m)</math> 消息缓冲区大小，因为每个 PE 可能具有相对于其他 PE 的传出边缘。

2D partitioning: Every processor gets a submatrix of the adjacency matrix. Assume the processors are aligned in a rectangle <math>p = p_r \times p_c</math>, where <math>p_r

2D partitioning: Every processor gets a submatrix of the adjacency matrix. Assume the processors are aligned in a rectangle <math>p = p_r \times p_c</math>, where <math>p_r

2 d 分区: 每个处理器都有一个邻接矩阵的子矩阵。假设处理器在一个矩形 < math > p = p _ r 乘以 p _ c </math > 中对齐，其中 < math > p _ r

2 d 分区: 每个处理器都有一个邻接矩阵的子矩阵。假设处理器在一个矩形 <math> p = p _ r 乘以 p _ c </math> 中对齐，其中 < math > p _ r

</math> and <math>p_c

</math> and <math>p_c